Fintronic Announces Super FinSim's support for Variable Precision computation in Verilog
Business Editors/High-Tech Writers
FOSTER CITY, Calif.--8:00am Friday, July 21st, 2006--
Fintronic USA, Inc., a leading provider of high-performance Verilog
simulators announced support for variable precision computation in its
Super FinSim Verilog simulators.
Dr. Alec Stanculescu, CEO and President of Fintronic USA, stated
"The availability of variable precision fixed and floating point
objects and associated implicit registers in Verilog along with
arithmetic operations and hyperbolic, trigonometric, power and
logarithm functions without the burden of using explicit conversion
functions is a step ahead in facilitating DSP peak value estimation
and ESL design exploration in general".
ABOUT VARIABLE PRECISION OBJECTS SUPPORTED BY SUPER FINSIM
Super FinSim uses IEEE std 1364 - 2001 attributes in order to specify
variable precision (VP) fixed point and IEEE 754/854 floating point
objects, as well as descriptors associated to them. System tasks are
used to associate descriptors to VP objects and to change at runtime
the various fields of the descriptor, i.e. various sizes (of integer
part, fractional part, exponent or mantissa), options (e.g. rounding,
overflow and underflow), and format of value representation
(e.g. fixed or floating).
Super FinSim supports arithmetic operations of combination of Verilog
literal integer, literal real, real, integer, reg, VP fixed point, and
IEEE 754/854 floating point. It also supports hyperbolic,
trigonometric, power and logarithm functions of variable precision fixed point
The total size of variable precision objects is currently limited to
80,000 bits and the precision of hyperbolic, trigonometric,
power and logarithm functions in the regular Super FinSim distribution
is a hefty 120 bits. Fintronic offers even better precision under
special agreements beyond the Super FinSim product.
Super FinSim supports several implicit registers associated to each
variable precision object, such as: overflow, nrOfTruncated bits, underflow,
peakNrOfBitsUsed, and cummulativeError. These implicit registers are
automatically set after each assignment and processes can be
sensitive to them.
Super FinSim supports overloading of operators and of equality so that
explicit conversion functions are not needed. Complex expressions are
supported via automatic generation of necessary temporary
variables. Temporary variables have descriptors associated
to them based on rules involving the default descriptor which can be
updated by the user before the evaluation of any complex expression.
The integration of Super FinSim with OSCI's SystemC makes the variable
precision computation available to SystemC users as well.
ABOUT FINTRONIC USA
Fintronic USA, Inc.is a technology leader in high-performance Verilog
Simulation. Fintronic has sold the first Verilog simulator on Linux in
1993. The company is committed to develop and deliver high
performance simulators that enable customers to verify efficiently the
functional and timing correctness of their most complex electronic
For more information on Fintronic USA, Inc. and its products, visit
(www.fintronic.com), contact Dr
Alec Stanculescu at (650) 349 0108, or send e-mail to
Note to Editors: FinSim is a registered trademark of
Fintronic USA. All other brand or product names may be trademarks or
registered trademarks of their respective companies and should be
treated as such.