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FinFilter generates FIR filters in gate-level Verilog


1. Introduction

FinFilter is formaly described in chapter 8 of FinSim's User's Guide, which you can also download as a .pdf file. 

FinFilter generates FIR filters as gate-level Verilog descriptions. For constant coefficients FinFilter generates an optimized network of adders that produces an output at each clock cycle. In case the sampling rate is higher than the rate of the internal clock, FinFilter generates more than one filtering unit, all working simultaneously. In case the output rate is smaller than the sampling rate some of the simultaneous filtering units are omitted.

FinFilter also generates the test bench that includes an input generator, code using mixed FinSimMath/Verilog to check the correctness of the results, code to create the graphical representation of the amplitude response, i/o spectrum and i/o signals, code that models the channeling of the sampled data to the input of the filter (performing deserialization/serialization as needed), bit accurate functional models of the resources used (e.g. adders, delays, etc.), as well as the computation of the distance between the ideal output and the output produced by the filter.

The generated filter can be simulated very fast since it uses resources modeled at the functional level, and at the same time one can easily replace a few resources with their gate-level models because the ports are at the Verilog bit level.

It is the combination of fast and accurate software simulations of the generated filter, the availability of the corresponding mathematical computation of the amplitude response and i/o spectrum and the highly optimized implementation of the generated filter that makes FinFilter an IP generator that takes full advantage of the capabilities of FinSimMath.

2. Input data for FinFilter

FinFilter accepts as inputs the following files:

2.1) a .res file providing the characteristics of the available resources: adders, multipliers, delays, etc. The characteristics include: number of available instances, latency, cost, size and format of operands.

The .res file consists of a header and of a body. The header consists of declaring the number of operators and the body contains a series of operators. If an operator is necessary and not provided, FinFilter will issue an error message.

An example of a .res file is provided below:

 
declare
  nrMemories = 0;
  nrOperators = 7;
  nrTargets = 1;
 enddeclare
 add add_fx_5_11;
   format = TWO's_COMPLEMENT;
   sz1 = 5;
   sz2 = 11;
   word_width = 16;
   latency = 1;
   cost = 112;
 end
 add add_fx_5_11;
   format = TWO's_COMPLEMENT;
   sz1 = 5;
   sz2 = 11;
   word_width = 16;
   latency = 1;
   cost = 112;
 end
 sub sub_fx_5_11;
   format = TWO's_COMPLEMENT;
   sz1 = 5;
   sz2 = 11;
   word_width = 16;
   latency = 1;
   cost = 112;
 end
 adc adc_fx_5_11;
   format = TWO's_COMPLEMENT;
   sz1 = 5;
   sz2 = 11;
   word_width = 16;
   latency = 1;
   cost = 112;
 end
 sbc sbc_fx_5_11;
   format = TWO's_COMPLEMENT;
   sz1 = 5;
   sz2 = 11;
   word_width = 16;
   latency = 1;
   cost = 112;
 end
 dl1 dl1_16;
   format = TWO's_COMPLEMENT;
   sz1 = 5;
   sz2 = 11;
   word_width = 16;
   latency = 1;
   cost = 96;
 end
 dl2 dl2_16;
   format = TWO's_COMPLEMENT;
   sz1 = 5;
   sz2 = 11;
   word_width = 16;
   latency = 2;
   cost = 112;
 end
 dl3 dl3_16;
   format = TWO's_COMPLEMENT;
   sz1 = 5;
   sz2 = 11;
   word_width = 16;
   latency = 3;
   cost = 112;
 end

The operators of type add, sub, adc, and sbc provides addition, subtraction, addition followed by negation, and subtraction followed by negation, respectively.

The operators dlk, where k is an integer, provide the delay of the data of width word_width with k clock cycles.

Note that there must be a consistency between the word_width, szs1, sz2, and the name of the operators. For example, add_fx_5_11 must have word_width = 16, sz1 = 5, sz2 = 11, and format = TWO'S_COMPLEMENT, as opposed to add_fl_12_52, which must have word_width = 64, sz1 = 12, sz2 = 52, and format = FLOATING.

The cost has to be determined by the user. A good approximation can be found on wikipedia.

2.2) a .cf file providing the specification of the filter, including:

2.2.1 unit of frequency (e.g. +frequency_unit=GHz),

2.2.2 timescale for simulation (e.g. -timescale 10ps/10ps,

2.2.3 description of amplitude response (e.g. +att=40 +ripple=0.1 +pa=0.1 +p1=0.225 +p2=0.375 +pb=0.5, meaning that frequencies from zero to 0.1 GHz are attenuated by 40db, and frequencies between 0.225GHz and 0.375GHz are kept with a ripple not to exceed 0.1db),

2.2.4 frequency of root clock for simulation purposes only (e.g. +mrate=20),

2.2.5 sampling rate (e.g. +srate=5),

2.2.6 internal clock rate (e.g. +irate=1),

2.2.7 output clock rate (e.g. orate=1),

2.2.8 frequencies of ideal output and of noise (e.g. +tb_f1=0.3 +tb_f2=0.05) Based on this information, the two sinusoid inputs will be generated and tehir sum supplied to the input of the filter. The frequency corresponding to tb_f1 is considered to be the ideal output and the the frequency corresponding to tb_f2 is considered to be the noise that has to be attenuated. The user must take care to supply appropriate values for tb_f1 and tb_f2.

2.2.9 size of fractional part of the coefficients (e.g. +coef_sz2=8)

2.2.10 number of samples to be considered (e.g. +nr_samples=1024, must be a power of 2)

2.2.11 indication that the coefficients are constant (e.g. +constant)

2.2.12 indication that the coefficients are symetric (e.g. +symetric)

2.2.13 as an option, a file containing coefficients generated outside FinFilter can also be provided here (e.g. +coef_file=myCoeffs.dat)

The file must contain on its first line the number of coefficients and then on each subsequent line the value of coefficients in %e format, e.g. 4.000000e-1, with the first coefficient first.

In case the coefficients are symetric, the first coefficient must be the non symetric one and only half of the remaining coefficients must be specified, the other being implied.

3) 2.2.14 a file containing an empty module which will be populated with the filter description. The name of the file is not relevant. The name of the module within the file will affect the name of the module representing the filter in the generated file. The name of the module will appear as prefix of the name of the generated file, and of the generated .html files representing the graphs of the amplitude response, i/o spectrum and i/o data.

3. Output files produced by FinFilter

FinFilter produces as outputs the following files:

3.1 a .v file containing:

3.1.1 input generator according to the speciffication provided in the .cf file,

3.1.2 FIR filter described at the gate level,

3.1.3 bit-accurate functional descriptions of the resources used (e.g. adders),

3.1.4 the test bench that generates the graphical representation of the amplitude response, input/output spectrum, and input/output waveforms,

3.1.5 code that performs the proof of correctness using mixed mathematical and verilog data.

3.1.6 code that provides the data to the filter and collects the results from the filter, in effect modeling the paralelisation/serialization of the data to and from the filter in case the sampling rate is faster than the internal clock.

3.1.7 code that computes the distance between the filtered output and the ideal output.

3.2 a .rep file providing the cost of the implementation of the generated filter in terms of the costs provided in the .res file, as well as detailed info regarding the various resources used.

4. Remarks regarding the generated filter

4.1 Constant coefficients

If the specification files contains the option +constant, the filter is customized for the particular set of coefficients and it is generated in terms of the minimum number of adders.

4.2 Truncating the coefficients

The size of the fractional part of the coefficients can be truncated at will using the option +coef_sz2. By truncating the coefficients more the cost of implementing the filter decreases but the quality of the filter (attenuation and ripple) decreases as well.

4.3 Multi-processing and decimation

In case the sampling rate is higher than the rate of the internal clock, several filtering units are processing simultanously the sampled data. In case the rate of the output clock is smaller than the sampling rate, some of the filtering units are omitted (if possible) in order to obtain the minimum hardware implementation.

5. Examples of using FinFilter

5.1 Introduction

The resource file is the same in all cases, Ex1.pdf.

Each of the examples represents a step in exploring the design space. Each example produces a report file related to cost and three graphs: amplitude response that is dependent on the number of bits used in the operation, the input output waveforms, and the input output spectrum.

5.2 Example 1

The first example is run by the script r. It uses the specification file f.cf and produces a cost report, as well as three graphs: Amplitude Gain, Filtered output vs input, and Input- Output Spectrum.

5.3 Example 2

The second example is similar to the first example except that the user specified that the fractional part of the coefficients should be truncated at 7 bits from the original 18. The efect of this optimization can be found in the new report. This example is run by the script r7 . It uses the specification file f7.cf and produces a cost report, as well as three graphs: Amplitude Gain, Filtered output vs input, and Input- Output Spectrum.

5.4 Example 3

The third example is similar to the first two examples except that the user asks for an optimization to decimate and interpolate the filtering results. The positive effects are a lower cost that shows in the new report and the negative ones are that some additional frequenies are added (which can be detected in the io spectrum and in the input/output waveforms. This example is run by the script r7di . It uses the specification file f7di.cf and produces a cost report, as well as three graphs: Amplitude Gain, Filtered output vs input, and Input- Output Spectrum..



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